A low distortion MOS sampling circuit
نویسندگان
چکیده
This paper presents a sampling technique with reduced distortion for use in a sample-and-hold circuit for high resolution analog-to-digital converters and switched capacitor filters. The technique involves bootstrapping both the gate and the bulk terminal of the sampling switch to improve linearity. Circuit implementation and SPICE level simulation results are presented.
منابع مشابه
Design of Track-and-hold Amplifier and Mulitiplying Digital to Analog Converter
This chapter presents the design of the track-and-hold and multiplying digital-to-analog converter functional blocks. They are realized by Switched Capacitors (SC) circuits. Typical SC circuit stage consists of sampling capacitors and Metal Oxide Semiconductor (MOS) switches which turn on and off at the clock rate to store the input signal (charge) on the sampling capacitors and subsequently tr...
متن کاملA Near 1-V Operational, 0.18-µm CMOS Passive Sigma-Delta Modulator with 77 dB of Dyanamic Range
A low-voltage operational capability near 1 V along with low noise and distortion characteristics have been realized in a passive sigma-delta modulator. To achieve low-voltage operation, the dc voltage in signal paths in the switched-capacitor-filter section was set to be 0.2 V so that sufficient gate-to-source voltages were obtained for metal-oxidesemiconductor (MOS) switches in signal paths w...
متن کاملA Micropower Current-Mode Euclidean Distance Calculator for Pattern Recognition
In this paper a new synthesis for circuit design of Euclidean distance calculation is presented. The circuit is implemented based on a simple two-quadrant squarer/divider block. The circuit that employs floating gate MOS (FG-MOS) transistors operating in weak inversion region, features low circuit complexity, low power (<20uW), low supply voltage (0.5V), two quadrant input current, wide dyn...
متن کاملLow-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit
In this paper, we propose a S/H circuit with the clock boost technique and the input signal tracking technique. The proposed circuit generates the clock with the amplitude of VDD + vin, and the clock is used to control the MOS switch. By applying this circuit to a S/H circuit, we can deal with the rail-to-rail signal with maintainng low distortion. Furthermore, the hold error caused by the char...
متن کاملCompact MOS Modelling for RF CMOS Circuit Simulation
Modem CMOS technologies are becoming increasingly attractive for RF applications. This imposes stringent requirements on compact models used in circuit simulation: not only currents and charges, but also noise, power gain, impedances, and harmonic distortion must be modelled accurately. In this paper several of these issues will be addressed with the help of Philips' new public-domain compact M...
متن کامل